Ever since the beginning of computing, it has always been necessary to move data from one component of a computing device to another, e.g. from the central processing unit (CPU) to memory, or from memory to a peripheral device. Data may be moved e.g. serially, i.e. one bit after another, over a single transmission line. Alternatively, for larger amount of data, they may be moved in parallel over multiple transmission lines.
However, there is a practical limit to the number of bits that can be moved in parallel at high speed, as the amount of transient noises caused by the rapid on and off switching of a large number of bit lines, at some points, cause sufficient interference to limit the distance the parallel transmission may be made.
To overcome this problem, differential signaling employing two transmission lines for each bit was designed. However, current practice has the disadvantage of continuing to consume power even during the quiescent states, when there are no data being transmitted over. This is especially undesirable for low power high performance application, such as portable computing devices with wide data paths.
Thus, a more power efficient differential signaling technique is desired.